SAN JOSE, Calif., Sept. 13, 2017 – Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced the Cadence® Conformal® Smart Logic Equivalence Checker (LEC), the next-generation equivalence checking ...
SAN MATEO, Calif. — On the verge of closing its sale to Cadence Design Systems Inc., Verplex Systems Inc. this week is releasing an upgrade to its Conformal line of equivalence checkers. Tony Larson, ...
A crucial step in design flow is to ensure that the gate-level design representation of an ASIC or system-on-a-chip (SoC) matches the RTL description through formal equivalence checking. Traditionally ...
Targeted for users of next-generation physical design closure tools, customer-owned tooling (COT) flows, and advanced ASIC flows, a new suite of formal verification products reaches into the physical ...
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